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Parametric and topological methods of bulk CMOS IP-blocks yield improvement

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dc.contributor.authorGerasimov, Y. M.
dc.contributor.authorGrigoryev, N. G.
dc.contributor.authorKobylyatskiy, A. V.
dc.contributor.authorГерасимов, Юрий Михайлович
dc.date.accessioned2024-11-21T08:22:39Z
dc.date.available2024-11-21T08:22:39Z
dc.date.issued2019
dc.description.abstract© 2019 Published under licence by IOP Publishing Ltd. This paper presents the study of the main reasons for the yield loss of modern nanometer VLSIs. The methods of the yield improvement are described on the basis of the impact of parametric and catastrophic reasons for its loss.
dc.identifier.citationGerasimov, Y. M. Parametric and topological methods of bulk CMOS IP-blocks yield improvement / Gerasimov, Y.M., Grigoryev, N.G., Kobylyatskiy, A.V. // IOP Conference Series: Materials Science and Engineering. - 2019. - 498. - № 1. - 10.1088/1757-899X/498/1/012024
dc.identifier.doi10.1088/1757-899X/498/1/012024
dc.identifier.urihttps://www.doi.org/10.1088/1757-899X/498/1/012024
dc.identifier.urihttps://www.scopus.com/record/display.uri?eid=2-s2.0-85065596429&origin=resultslist
dc.identifier.urihttp://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcAuth=Alerting&SrcApp=Alerting&DestApp=WOS_CPL&DestLinkType=FullRecord&UT=WOS:000472784800024
dc.identifier.urihttps://openrepository.mephi.ru/handle/123456789/17949
dc.relation.ispartofIOP Conference Series: Materials Science and Engineering
dc.titleParametric and topological methods of bulk CMOS IP-blocks yield improvement
dc.typeConference Paper
dspace.entity.typePublication
oaire.citation.issue1
oaire.citation.volume498
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