Compiler Generated Multithreading to Alleviate Memory Latency

dc.creatorBeyls,Kristof
dc.creatorHollander,Erik H. D
dc.date2000
dc.date.accessioned2024-02-06T12:50:48Z
dc.date.available2024-02-06T12:50:48Z
dc.descriptionSince the era of vector and pipelined computing, the computational speed is limited by the memory access time. Faster caches and more cache levels are used to bridge the growing gap between the memory and processor speeds. With the advent of multithreaded processors, it becomes feasible to concurrently fetch data and compute in two cooperating threads. A technique is presented to generate these threads at compile time, taking into account the characteristics of both the program and the underlying architecture. The results have been evaluated for an explicitly parallel processor. With a number of common programs the data-fetch thread allows to continue the computation without cache miss stalls.
dc.formattext/html
dc.identifierhttps://doi.org/10.3217/jucs-006-10-0968
dc.identifierhttps://lib.jucs.org/article/27721/
dc.identifier.urihttps://openrepository.mephi.ru/handle/123456789/7828
dc.languageen
dc.publisherJournal of Universal Computer Science
dc.relationinfo:eu-repo/semantics/altIdentifier/eissn/0948-6968
dc.relationinfo:eu-repo/semantics/altIdentifier/pissn/0948-695X
dc.rightsinfo:eu-repo/semantics/openAccess
dc.rightsJ.UCS License
dc.sourceJUCS - Journal of Universal Computer Science 6(10): 968-993
dc.subjectdata locality
dc.subjectmultithreading
dc.subjectrun-time data relocation
dc.subjectcompiler optimization
dc.subjectcache optimization
dc.subjectprefetching
dc.subjecttiling
dc.titleCompiler Generated Multithreading to Alleviate Memory Latency
dc.typeResearch Article
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