An Open Software Architecture for the Verification of Industrial Controllers

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dc.creatorTreseler,Heinz
dc.creatorStursberg,Olaf
dc.creatorChung,Paul W. H.
dc.creatorYang,Shuanghua
dc.date2001
dc.date.accessioned2024-02-06T12:51:03Z
dc.date.available2024-02-06T12:51:03Z
dc.descriptionThe paper presents a tool architecture which supports the formal verification of logic controllers for processing systems. The tool's main intention is to provide a front-end for modelling the controller as well as the processing systems. The models are automatically transformed into representations which can be analysed by existing model checking algorithms. While the first part of the paper gives an overview of the complete architecture, the second part introduces a newly developed modelling interface: Process Control Event Diagrams (PCEDs) are formally defined as a suitable means to represent the flow of information in controlled processes. The transformation of PCEDs into verifiable code is described, and the whole procedure of modelling, model transformation and verification is illustrated with a simple processing system.
dc.formattext/html
dc.identifierhttps://doi.org/10.3217/jucs-007-01-0037
dc.identifierhttps://lib.jucs.org/article/27763/
dc.identifier.urihttps://openrepository.mephi.ru/handle/123456789/7905
dc.languageen
dc.publisherJournal of Universal Computer Science
dc.relationinfo:eu-repo/semantics/altIdentifier/eissn/0948-6968
dc.relationinfo:eu-repo/semantics/altIdentifier/pissn/0948-695X
dc.rightsinfo:eu-repo/semantics/openAccess
dc.rightsJ.UCS License
dc.sourceJUCS - Journal of Universal Computer Science 7(1): 37-53
dc.subjectmodel checking
dc.subjectformal verification
dc.subjectlogic controller
dc.subjectprocess control event diagram
dc.subjecttool development
dc.titleAn Open Software Architecture for the Verification of Industrial Controllers
dc.typeResearch Article
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