A New Architecture for Concurrent Lazy Cyclic Reference Counting on Multi-Processor Systems

dc.creatorFormiga,Andrei
dc.creatorLins,Rafael
dc.date2007
dc.date.accessioned2024-02-06T12:55:33Z
dc.date.available2024-02-06T12:55:33Z
dc.descriptionMulti-processor systems have become the standard in current computer architectures. Software developers have the possibility to take advantage of the additional computing power available to concurrent programs. This paper presents a way to automatically use additional processors, by performing memory management concurrently. A new architecture with little explicit synchronization for concurrent lazy cyclic reference counting is described. This architecture was implemented and preliminary performance tests point at significant efficiency improvements over the sequential counterpart.
dc.formattext/html
dc.identifierhttps://doi.org/10.3217/jucs-013-06-0817
dc.identifierhttps://lib.jucs.org/article/28808/
dc.identifier.urihttps://openrepository.mephi.ru/handle/123456789/9382
dc.languageen
dc.publisherJournal of Universal Computer Science
dc.relationinfo:eu-repo/semantics/altIdentifier/eissn/0948-6968
dc.relationinfo:eu-repo/semantics/altIdentifier/pissn/0948-695X
dc.rightsinfo:eu-repo/semantics/openAccess
dc.rightsJ.UCS License
dc.sourceJUCS - Journal of Universal Computer Science 13(6): 817-829
dc.subjectmemory management
dc.subjectgarbage collection
dc.subjectreference counting
dc.subjectconcurrent garbage collection
dc.titleA New Architecture for Concurrent Lazy Cyclic Reference Counting on Multi-Processor Systems
dc.typeResearch Article
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