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Parametric layout cell design of N-MOS transistor with enhanced radiation hardened properties

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dc.contributor.authorKhokhlov, K. O.
dc.contributor.authorSerazetdinov, A. R.
dc.contributor.authorAtkin, E. V.
dc.contributor.authorСеразетдинов, Артур Рафикович
dc.contributor.authorАткин, Эдуард Викторович
dc.date.accessioned2024-11-27T14:41:39Z
dc.date.available2024-11-27T14:41:39Z
dc.date.issued2020
dc.description.abstract© 2020 American Institute of Physics Inc.. All rights reserved.NMOS design methodology with increased radiation hardness based on the standard manufacturer's technological libraries is presented. Key model parameters definition are discussed, as well as layout design for parametrized components and connected with layout configuration features when projecting integral layout. Test structures are presented for components characterization in radiation environment.
dc.identifier.citationKhokhlov, K. O. Parametric layout cell design of N-MOS transistor with enhanced radiation hardened properties / Khokhlov, K.O., Serazetdinov, A.R., Atkin, E.V. // AIP Conference Proceedings. - 2020. - 2313. - 10.1063/5.0036567
dc.identifier.doi10.1063/5.0036567
dc.identifier.urihttps://www.doi.org/10.1063/5.0036567
dc.identifier.urihttps://www.scopus.com/record/display.uri?eid=2-s2.0-85097977773&origin=resultslist
dc.identifier.urihttp://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcAuth=Alerting&SrcApp=Alerting&DestApp=WOS_CPL&DestLinkType=FullRecord&UT=WOS:000679348500270
dc.identifier.urihttps://openrepository.mephi.ru/handle/123456789/22858
dc.relation.ispartofAIP Conference Proceedings
dc.titleParametric layout cell design of N-MOS transistor with enhanced radiation hardened properties
dc.typeConference Paper
dspace.entity.typePublication
oaire.citation.volume2313
relation.isAuthorOfPublicationa2509ba8-5d87-4a16-8e1f-ee3f2c77307c
relation.isAuthorOfPublication7406d9ba-4486-4be9-842f-849f66cce42c
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